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Verification IP
test and verify SoC's protocols and interface buses.
- Pickering Interfaces Inc.
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EBIRST 104-pin D-type Verification Fixture
93-022-101
The 93-022-101 104-pin D-type Verification Fixture is an accessory for the eBIRST range of USB controlled test tools capable of performing automated path resistance tests on Pickering Interfaces switching solutions. The tool simply interfaces with the switching system's connector so a test can be run using the supplied Windows-based software.
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Waterproof Test Chamber
JL-XC
JL-XC series waterproof test chamber is mainly used for small electronic and electrical products. Such as lamps, electrical cabinets, electrical components and so one. The products are tested for physical and other related properties under simulated climatic conditions. After the test, it is judged whether the performance of the product meets the requirements by verification, so as to be used in the design, improvement, verification and factory inspection of the product. Comply with IEC60529:2001 《Degrees of protection provided by enclosures (IP Code)》, GB4208-2008 《Shell Protection Grade (IP Code)》 14.2.8 Terms and GB7000.1 《Lamps Part 1: General Requirements and Tests》 9.2.9 Terms.
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Field Ttesters
Our product range comprises from small handheld, battery fed testers to full featured service performance assurance tools and distributed monitoring systems. We have several product lines including:QoS / SLA verification system Ethernet, IP, Critical Data, VoIP, IPTV .Hand-held testers: Gigabit Ethernet, Synchronous Ethernet, E1, PDH, SDH, Ethernet, IP, Jitter, Wander, Datacom, Frame Relay, etc.
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EMBEDDED MMC (EMMC)
SD 3.0 / eMMC 4.51 IP Family
The eMMC Host IP is an RTL design in Verilog that implements an MMC / eMMC host controller in an ASIC or FPGA. The core includes RTL code, test scripts and a test environment for full simulation verifications. The Arasan MMC / eMMC Host IP Core has been widely used in different MMC applications by major semiconductor vendors with proven silicon.
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ADSL / 2 / 2+ Handheld VoIP Tester
QuickTest 500
*Rapid Testing. The QuickTest 500 ADSL2+ Tester's automatic Service Verification Test Suite starts as soon as you switch on (results are typically obtained in less than 3 minutes)*Simple to use. Virtually no product training required with QuickTest 500 ADSL Tester*Configurable Pass / Fail Indicators on the LCD display and clearly presented in multi-colour LEDs on the front panel*No need to get a laptop out*Save and name up to 16 test results at any one time*Line Voltage LED indicates poor, missing or excessive Line Voltage*ADSL/2/2+ Test LEDs to indicate if ADSL Showtime achieved*In Service LED indicates problems with PPP or IP layer*LEDs to indicate problems with the Trained Line Rate, poor Noise Margin or excessive Line Attenuation
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Analyze RTL
ASICs and FPGA routinely have millions of gates with memories, transceivers, third party IP and processor cores. Problems can be time consuming and complex to debug in the lab and through simulations. Designers need verification tools that can identify problems quickly to reduce their verification and debug time before simulation, before synthesis, and definitely before burning chips in the lab.
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Emulation Platform
Veloce
The Veloce® Emulation Platform dramatically reduces risk in the verification of today’s complex SoCs and is a core technology in the Mentor Enterprise Verification Platform™ (EVP). Mentor’s software and application solutions and continual enhancements enable a comprehensive verification environment for IP, chip, and system level verification.
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MIPI Soundwire Total IP Solutions
Soundwire
Soundwire is suited for small, cost-sensitive audio peripherals such as modern digital class-D amplifiers and digital microphones. The Total MIPI SoundWire IP Solution from Arasan enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package that includes the Verilog RTL source code for Master and Slave, fully validated for compliance with the standard, a comprehensive test environment with a compliance suite for verification of the IP package, a SoundWire Hardware Development Kit (“HDK”) for FPGA prototyping, a SoundWire protocol analyzer and a complete SoundWire software stack.
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IP Reuse
IC Manage Global Design Platform (GDP & GDP-XL) includes an open platform for maximizing IP reuse. Design and verification teams can use the system to rapidly publish and integrate IP into existing flows, and to trace bug dependencies. Internal and third party IP can be imported or linked with IP Central from multiple commercial and open source design management systems, as well as internal revision control systems. ”
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Ethernet Testing Network Performance
Networked Communication Solutions, LLC
Xena Networks and Veryx Technologies have created an innovative Ethernet test platform that combines Xena’s high performance, wire-speed Ethernet test hardware with Veryx’s broad portfolio of IP & Ethernet functional and conformance test suites. The result: an affordable, high-performance platform for IP & Ethernet load stress, protocol conformance & functional verification testing.
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MIPI Total Display IP Solution
DSI
The Arasan MIPI Display Serial Interface (DSI) Controller IP provides both device and host functionality. Additionally, the DSI Controller provides a high-speed serial interface between an application processor and display and follows a rigorous verification methodology to ensure interoperability of our DSI digital controller with our D-PHY analog IP. Arasan’s DSI solutions are MIPI standards-compliant and are designed to accelerate integration, lower risk and accelerate time to market for developers of display applications. Arasan’s expertise is backed by our unique silicon proven design discipline and product development process that ensures fast silicon success with our analog and digital IP.
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IP Telephony
PLANET integrated HD VoIP solution consisting of IP PBX system, VoIP gateway, VoIP phone, IP intercom and IP paging, and analog telephone adapter features wideband-compliant, crisp and clear sound quality. PLANET IP telephony products support enterprises of all kinds to expand offices and branches in new locations.
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IP Converters
SMPTE-2022 compliant standalone solutions for conversion between IP and "traditional" DTV signals such as ASI and QAM. These IP converters are hardware-based, providing low latency and zero-jitter transmission of IP signals.
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Calibration and Verification Kits
Flann offers a wide range of calibration and verification kits to suit many applications and price points. Compatibility with the vast majority of current and legacy VNAs can be provided. Additionally full customisation of our kits is possible to suit your requirements.
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Rapita Verification Suite
RVS
*Run requirements-based tests on your code *Produce coverage evidence including MC/DC from tests *Analyze execution time including worst-case timing on-target *Understand program scheduling behavior *Produce evidence for DO-178 and ISO 26262 certification
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Audio IP
We provide high-performance, compact, low power and customizable audio analog mixed-signal IP in leading foundry processes, including a wide range of ADC, DAC, CODEC and Voice Activity Detectors.
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Content Verification System
Pulsar
Pulsar is an automated content verification system for stored media files. It is designed for use by Broadcasters, Service Providers, Content Creators and Optical Media replicators allowing them to analyze the content before it is put live or stamped on the optical media. The software performs conformance and quality analysis on the streams provided. It allows definition of a range of user-defined checks to be performed as part of the Analysis.
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Functional Verification
The Mentor Graphics Scalable Verification" is the most comprehensive EDA solution for functional verification, merging standards support, tools and a "design for verification" methodology to minimize verification cycles and costly design respins.
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Interface IP
Synopsys provides the industry’s broadest portfolio of complete, silicon-proven IP solutions, with leading power, performance, area, and security, for the most widely used interfaces such as PCI Express®, CXL, USB, Ethernet, DDR, HBM, Die-to-Die, CCIX, MIPI, HDMI, and Bluetooth.
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Complete IP Module
Scan Ring Linker SRL
The Scan Ring Linker SRLTM - is a complete IP module that can be easily embedded into a CPLD, FPGA or ASIC on a PCB to reduce the complexities and costs of designing 1149.1 (JTAG) test infrastructure for designs that use multiple scan rings. The SRL IP module links any number of scan rings (secondary scan paths) into a single high-speed test bus, which permits devices on secondary scan chains to be independently tested and configured through a single 1149.1 external interface.
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IP Gateway
3507Rx
Hangzhou Softel Optic Co., Ltd.
SFT3507Rx IP to ASI Gigabits gateway is a head-end interface device which is used for DVB ASI and Ethernet . As a kind of IP receiver, this device can recover UDP database received from the transporting device into TS stream and then output it through the ASI output interfaces. Moreover, it has the function to resist the IP transporting jitter, and to restore the PCR of the TS stream. This device can maximum receive 12 channel IP and output 12 ASI, also, it can simultaneously transmit the 12 IP stream into 12 TS stream.
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Static Design Verification
ALINT-PRO
ALINT-PRO™ is a design verification solution for RTL code written in VHDL, Verilog, and SystemVerilog, which is focused on verifying coding style and naming conventions, RTL and post-synthesis simulation mismatches, smooth and optimal synthesis, correct FSM descriptions, avoiding problems on further design stages, clocks and reset tree issues, CDC, RDC, DFT, and coding for portability and reuse. The solution performs static analysis based on RTL and SDC™ source files uncovering critical design issues early in the design cycle, which in turn reduces design signoff time dramatically. Running ALINT-PRO before the RTL simulation and logic synthesis phases prevents design issues spreading into the downstream stages of design flow and reduces the number of iterations required to finish the design.
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CPE Design Verification System
Jupiter 310
Jupiter is the industry standard for automated DOCSIS physical (PHY) layer testing. It provides the most comprehensive test coverage and accurate results on the market for DOCSIS 3.1 devices.
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IP Parallel HV
High Voltage [up to 30V] IP Compatible card with 48 programmable IO. 40 mA sink. Open collector interface. Interrupt generator on each input channel. Filtered or direct input.
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Field Testing & Verification Services
TMD can assist your utility with virtually any metering-related product or service, and one of the most impactful services we provide is our field testing services.
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KVM Over IP
The ultimate zero latency, scalable, 4K60 solution. Pathfinder provides a zero latency, 4K KVM extension and switching solution. Extend 4K and HD sources via CAT or Fiber cable to create flexible, wide reaching KVM over IP matrixing solutions. Highly scalable, with up to 3,000+ high-quality endpoints in a single system, it’s the perfect solution for mission critical control and collaboration. Pathfinder offers plug and play set up with no configuration of endpoints required, nor any costly user licensing fees.
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Online Lightning Verification Report
STRIKEnet®
Vaisala STRIKEnet Provides the Most Reliable Lightning Location Technology for Objective Claim Verification. Vaisala STRIKEnet® is an online lightning verification report that objectively and accurately reports individual cloud-to-ground lightning strikes at a specific location on the date of loss.
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IP code Testing
Educated Design & Development, Inc.
Complies with various IEC, EN, CE, VDE, UL & CSA requirementsUnit comes with NIST traceable / ISO 17025 accredited certificate of calibration.ED&D is ISO 17025 accredited by ACLASS, an ILAC Member. Measurement data and uncertainty data is available.Uses RTS-01 Rain Spray Head
